NXP's new 65V LDMOS technology: designed for ease of use.

More power - Higher voltage enables higher power density, which helps reduce the number of transistors to combine.
Faster development time - With higher voltage, the output power can be increased while retaining a reasonable output impedance.
Design Reuse - This impedance benefit also ensures pin-compatibility with current 50V LDMOS transistors for better scalability.
Manageable current level - Higher voltage reduces the current losses in the system.
Wide safety margin - The higher breakdown voltage of 182 V improves ruggedness and allows for higher efficiency classes of operation.

 
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